Invention Grant
- Patent Title: Varistor assembly
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Application No.: US17299774Application Date: 2019-12-02
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Publication No.: US11545284B2Publication Date: 2023-01-03
- Inventor: Yoshiko Higashi , Eiichi Koga , Masayuki Takagishi
- Applicant: Panasonic Intellectual Property Management Co., Ltd.
- Applicant Address: JP Osaka
- Assignee: Panasonic Intellectual Property Management Co., Ltd.
- Current Assignee: Panasonic Intellectual Property Management Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JPJP2019-004888 20190116
- International Application: PCT/JP2019/047077 WO 20191202
- International Announcement: WO2020/149034 WO 20200723
- Main IPC: H01C7/10
- IPC: H01C7/10 ; H01C1/14 ; H01C17/28

Abstract:
Provided is a varistor assembly capable of achieving good surge breakdown voltage while suppressing capacitance. The varistor assembly is obtained by connecting a plurality of varistor elements in parallel. Each varistor element includes: a sintered body obtained by sintering a laminate in which varistor layers and internal electrodes are alternately laminated; and a pair of external electrodes provided in a state where the internal electrodes are alternately connected on at least both end faces of this sintered body. Varistor element includes at least a plurality of first group varistor elements in which a value obtained by dividing a surface area of the sintered body by a volume of the sintered body is 1.9 mm−1 or more.
Public/Granted literature
- US20220020512A1 VARISTOR ASSEMBLY Public/Granted day:2022-01-20
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