Techniques and apparatus for controlling gate drivers of a switched-mode power supply (SMPS) circuit—such as a three-level buck converter, a divide-by-two charge pump, or an adaptive combination power supply circuit capable of switching therebetween—in a power-saving mode (e.g., a pulse-skipping mode). During such a power-saving mode in which a capacitor of a charge pump is disconnected from at least one power supply rail (e.g., first and second input nodes of the charge pump) and is coupled to power terminals of one or more drivers of the SMPS circuit, the capacitor is temporarily disconnected from the power terminals and temporarily coupled to the at least one power supply rail (e.g., for a few microseconds).