An integrated circuit structure includes a metal-insulator-metal (MIM) capacitor and a thin-film resistor (TFR) formed concurrently, using components of shared material layers. A first metal layer may be patterned to form lower components of an interconnect structure, MIM capacitor, and TFR, and a second metal layer may be patterned to form upper components of the interconnect structure, MIM capacitor, and TFR. A via layer may be deposited to form interconnect vias, a cup-shaped bottom electrode component of the MIM capacitor, and a pair of TFR contact vias for the TFR. An insulator layer may be patterned to form both an insulator for the MIM capacitor and an insulator cap over the TFR element.