Invention Grant
- Patent Title: Array substrate, manufacturing method thereof, and display apparatus
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Application No.: US16812619Application Date: 2020-03-09
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Publication No.: US11552148B2Publication Date: 2023-01-10
- Inventor: Weilin Lai , Yucheng Chan , Jianbang Huang
- Applicant: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
- Applicant Address: CN Inner Mongolia; CN Beijing
- Assignee: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.,BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.,BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Inner Mongolia; CN Beijing
- Agency: Collard & Roe, P.C.
- Priority: CN201510665742.0 20151015
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L27/32 ; H01L29/66 ; H01L51/56 ; H01L29/786 ; H01L21/84 ; H01L27/12 ; H01L21/8234 ; H01L21/265 ; H01L21/266 ; H01L21/768 ; H01L51/52

Abstract:
An array substrate, its manufacturing method, and a display apparatus are provided. The array substrate having a substrate, includes: a monocrystalline silicon substrate employed as the substrate including a central display area, a first peripheral area, and a second peripheral area; substrate circuits integrated with a scan drive circuit in the first peripheral area, a data drive circuit in the second peripheral area, and a plurality of pixel circuits in the central display area; a plurality of scan lines in the central display area and coupled to the scan drive circuit; and a plurality of data lines in the central display area and coupled to the data drive circuit. The scan drive circuit, the data drive circuit, and the plurality of pixel circuits include a plurality of transistors, each of which has an active region inside the monocrystalline silicon layer.
Public/Granted literature
- US20200212153A1 ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY APPARATUS Public/Granted day:2020-07-02
Information query
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