Invention Grant
- Patent Title: Method of manufacturing semiconductor device having split-gate memory and MISFET
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Application No.: US16928854Application Date: 2020-07-14
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Publication No.: US11563111B2Publication Date: 2023-01-24
- Inventor: Atsushi Amo
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JPJP2019-142282 20190801
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/28
Abstract:
A trench is formed by removing a portion of each of the charge accumulation film and the insulating film located between the control gate electrode and the memory gate electrode. The insulating film is formed in the trench so that the upper surface of each of the insulating film and the charge accumulation film is covered with the insulating film. When exposing the upper surface of the control gate electrode and the memory gate electrode, the upper surface of each of the insulating film and the charge accumulation film is not exposed.
Public/Granted literature
- US20210036132A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2021-02-04
Information query
IPC分类:
