Invention Grant
- Patent Title: Integrated circuit and method for fabricating the same
-
Application No.: US17086076Application Date: 2020-10-30
-
Publication No.: US11569223B2Publication Date: 2023-01-31
- Inventor: Tao-Yi Hung , Wun-Jie Lin , Jam-Wem Lee , Kuo-Ji Chen , Chia-En Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L21/8238 ; H01L27/092

Abstract:
A method for fabricating an integrated circuit is provided. The method includes etching a first recess in a semiconductor structure; forming a first doped epitaxial feature in the first recess; and forming a second doped epitaxial feature over the first doped epitaxial feature, wherein the second doped epitaxial feature has a conductive type opposite to a conductive type of the first doped epitaxial feature.
Public/Granted literature
- US20220139903A1 INTEGRATED CIRCUIT AND METHOD FOR FABRICATING THE SAME Public/Granted day:2022-05-05
Information query
IPC分类: