Invention Grant
- Patent Title: Methods for forming conductive vias, and associated devices and systems
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Application No.: US17230833Application Date: 2021-04-14
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Publication No.: US11574842B2Publication Date: 2023-02-07
- Inventor: Trupti D. Gawai , David A. Kewley , Aaron M. Lowe , Radhakrishna Kotti , David S. Pratt
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/535

Abstract:
Methods of manufacturing semiconductor devices, and associated systems and devices, are disclosed herein. In some embodiments, a method of manufacturing a semiconductor device includes forming an opening in an insulative material at least partially over an electrically conductive feature. The method can further include forming a ring of electrically non-conductive material extending at least partially about a sidewall of the insulative material that defines the opening. The method can further include removing a portion of the ring to form an opening over the electrically conductive feature, and then depositing an electrically conductive material into the opening in the ring to form a conductive via electrically coupled to the electrically conductive feature.
Public/Granted literature
- US20220336277A1 METHODS FOR FORMING CONDUCTIVE VIAS, AND ASSOCIATED DEVICES AND SYSTEMS Public/Granted day:2022-10-20
Information query
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