Invention Grant
- Patent Title: Dynamic load balancing for multi-core computing environments
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Application No.: US17018809Application Date: 2020-09-11
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Publication No.: US11575607B2Publication Date: 2023-02-07
- Inventor: Stephen Palermo , Bradley Chaddick , Gage Eads , Mrittika Ganguli , Abhishek Khade , Abhirupa Layek , Sarita Maini , Niall McDonnell , Rahul Shah , Shrikant Shah , William Burroughs , David Sonnier
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Hanley, Flight & Zimmerman, LLC
- Main IPC: H04L47/125
- IPC: H04L47/125 ; H04L47/62 ; H04L47/625 ; H04L47/6275

Abstract:
Methods, apparatus, systems, and articles of manufacture are disclosed for dynamic load balancing for multi-core computing environments. An example apparatus includes a first and a plurality of second cores of a processor, and circuitry in a die of the processor separate from the first and the second cores, the circuitry to enqueue identifiers in one or more queues in the circuitry associated with respective ones of data packets of a packet flow, allocate one or more of the second cores to dequeue first ones of the identifiers in response to a throughput parameter of the first core not satisfying a throughput threshold to cause the one or more of the second cores to execute one or more operations on first ones of the data packets, and provide the first ones to one or more data consumers to distribute the first data packets.
Public/Granted literature
- US20210075730A1 DYNAMIC LOAD BALANCING FOR MULTI-CORE COMPUTING ENVIRONMENTS Public/Granted day:2021-03-11
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