Invention Grant
- Patent Title: Semiconductor package having semiconductor element with pins and formation method thereof
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Application No.: US16913020Application Date: 2020-06-26
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Publication No.: US11581196B2Publication Date: 2023-02-14
- Inventor: Xuhui Peng , Kerui Xi , Tingting Cui , Feng Qin , Jie Zhang
- Applicant: Shanghai Tianma Micro-Electronics Co., Ltd. , Shanghai AVIC OPTO Electronics Co.,Ltd.
- Applicant Address: CN Shanghai; CN Shanghai
- Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.,Shanghai AVIC OPTO Electronics Co.,Ltd.
- Current Assignee: Shanghai Tianma Micro-Electronics Co., Ltd.,Shanghai AVIC OPTO Electronics Co.,Ltd.
- Current Assignee Address: CN Shanghai; CN Shanghai
- Agency: Anova Law Group PLLC
- Priority: CN202010393854.6 20200511
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L21/56 ; H01L23/498 ; H01L23/00

Abstract:
A semiconductor package and a method of forming the semiconductor package are provided. The method includes providing a first substrate, forming a wiring structure containing at least two first wiring layers, disposing a first insulating layer between adjacent two first wiring layers, and patterning the first insulating layer to form a plurality of first through-holes. The adjacent two first wiring layers are electrically connected to each other through the plurality of first through-holes. The method also includes providing at least one semiconductor element each including a plurality of pins. In addition, the method includes disposing the plurality of pins of the each semiconductor element on a side of the wiring structure away from the first substrate. Further, the method includes encapsulating the at least one semiconductor element, and placing a ball on a side of the wiring structure away from the at least one semiconductor element.
Public/Granted literature
- US20210351042A1 SEMICONDUCTOR PACKAGE AND FORMATION METHOD THEREOF Public/Granted day:2021-11-11
Information query
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