Invention Grant
- Patent Title: Arithmetic unit for deep learning acceleration
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Application No.: US16280960Application Date: 2019-02-20
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Publication No.: US11586907B2Publication Date: 2023-02-21
- Inventor: Surinder Pal Singh , Giuseppe Desoli , Thomas Boesch
- Applicant: STMICROELECTRONICS S.R.L. , STMICROELECTRONICS INTERNATIONAL N.V.
- Applicant Address: IT Agrate Brianza; NL Schiphol
- Assignee: STMICROELECTRONICS S.R.L.,STMICROELECTRONICS INTERNATIONAL N.V.
- Current Assignee: STMICROELECTRONICS S.R.L.,STMICROELECTRONICS INTERNATIONAL N.V.
- Current Assignee Address: IT Agrate Brianza; NL Schiphol
- Agency: Seed Intellectual Property Law Group LLP
- Main IPC: G06F9/02
- IPC: G06F9/02 ; G06N3/08 ; G06N20/00 ; G06F17/11 ; G06N3/04 ; G06N3/063 ; G06F9/30

Abstract:
Embodiments of a device include an integrated circuit, a reconfigurable stream switch formed in the integrated circuit, and an arithmetic unit coupled to the reconfigurable stream switch. The arithmetic unit has a plurality of inputs and at least one output, and the arithmetic unit is solely dedicated to performance of a plurality of parallel operations. Each one of the plurality of parallel operations carries out a portion of the formula: output=AX+BY+C.
Public/Granted literature
- US20190266485A1 ARITHMETIC UNIT FOR DEEP LEARNING ACCELERATION Public/Granted day:2019-08-29
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