Disclosed is a three-dimensional semiconductor memory device comprising a peripheral circuit structure on a first substrate, a second substrate on the peripheral circuit structure, first to fourth stack structures spaced apart in a first direction on the second substrate, first and second support connectors between the second and third stack structures, third and fourth support connectors between the third and fourth stack structures, and a through dielectric pattern penetrating the first stack structure and the second substrate. A first distance between the first and second support connectors is different from a second distance between the third and fourth support connectors.