Invention Grant
- Patent Title: Reducing file write latency
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Application No.: US17324179Application Date: 2021-05-19
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Publication No.: US11599269B2Publication Date: 2023-03-07
- Inventor: Prasanth Jose , Gurudutt Kumar Vyudayagiri Jagannath
- Applicant: VMWARE, INC.
- Applicant Address: US CA Palo Alto
- Assignee: VMWARE, INC.
- Current Assignee: VMWARE, INC.
- Current Assignee Address: US CA Palo Alto
- Agency: Barta, Jones & Foley, PLLC
- Priority: IN202141011327 20210317
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/08 ; G06F16/10

Abstract:
Reducing file write latency includes receiving incoming data, from a data source, for storage in a file and a target storage location for the incoming data, and determining whether the target storage location corresponds to a cache entry. Based on at least the target storage location not corresponding to a cache entry, the incoming data is written to a block pre-allocated for cache misses and the writing of the incoming data to the pre-allocated block is journaled. The writing of the incoming data is acknowledged to the data source. A process executing in parallel with the above commits the incoming data in the pre-allocated block with the file. Using this parallel process to commit the incoming data in the file removes high-latency operations (e.g., reading pointer blocks from the storage media) from a critical input/output path and results in more rapid write acknowledgement.
Public/Granted literature
- US20220300163A1 REDUCING FILE WRITE LATENCY Public/Granted day:2022-09-22
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