Invention Grant
- Patent Title: Cache memory architecture and management
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Application No.: US17385257Application Date: 2021-07-26
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Publication No.: US11599461B2Publication Date: 2023-03-07
- Inventor: Michael Scharland , Mark Halstead , Rong Yu , Peng Wu , Benjamin Yoder , Kaustubh Sahasrabudhe
- Applicant: EMC IP Holding Company LLC
- Applicant Address: US MA Hopkinton
- Assignee: EMC IP Holding Company LLC
- Current Assignee: EMC IP Holding Company LLC
- Current Assignee Address: US MA Hopkinton
- Agent Krishnendu Gupta; Nikhil Patel
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0802 ; G06F13/20

Abstract:
Aspects of the present disclosure relate to data cache management. In embodiments, a storage array's memory is provisioned with cache memory, wherein the cache memory includes one or more sets of distinctly sized cache slots. Additionally, a logical storage volume (LSV) is established with at least one logical block address (LBA) group. Further, at least one of the LSV's LBA groups is associated with two or more distinctly sized cache slots based on an input/output (IO) workload received by the storage array.
Public/Granted literature
- US20230023314A1 CACHE MEMORY ARCHITECTURE AND MANAGEMENT Public/Granted day:2023-01-26
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