An information handling system, including two or more single-slot M.2 modules; a dual-slot discrete graphics processing unit (dGPU) module; a printed circuit board, including: a plurality of M.2 connectors aligned on a same edge of the printed circuit board such that: a first single-slot M.2 module of the two or more single-slot M.2 modules is coupled to a first M.2 connector of the plurality of M.2 connectors; a second single-slot M.2 module of the two or more single-slot M.2 modules is coupled to a second M.2 connector of the plurality of M.2 connectors; and the dual-slot dGPU module is coupled to a third and a fourth M.2 connector of the plurality of M.2 connectors.