Invention Grant
- Patent Title: Semiconductor device including via structure for vertical electrical connection
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Application No.: US17334571Application Date: 2021-05-28
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Publication No.: US11631631B2Publication Date: 2023-04-18
- Inventor: Chin-Cheng Kuo
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L23/00
Abstract:
A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, a conductive structure and at least one via structure. The conductive structure is disposed on an upper surface of the semiconductor substrate. The at least one via structure is disposed in the semiconductor substrate. A portion of the at least one via structure extends beyond the conductive structure.
Public/Granted literature
- US20220384310A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2022-12-01
Information query
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