Invention Grant
- Patent Title: Systems and methods for addressing cryptoprocessor hardware scaling limitations
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Application No.: US17208350Application Date: 2021-03-22
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Publication No.: US11665148B2Publication Date: 2023-05-30
- Inventor: Sujal Sheth , Eric Voit
- Applicant: Cisco Technology Inc.
- Applicant Address: US CA San Jose
- Assignee: CISCO TECHNOLOGY, INC.
- Current Assignee: CISCO TECHNOLOGY, INC.
- Current Assignee Address: US CA San Jose
- Agency: Baker Botts L.L.P.
- Main IPC: H04L9/40
- IPC: H04L9/40 ; G06F21/60

Abstract:
The present disclosure is directed to systems and methods to address cryptoprocessor hardware scaling limitations, the method including the steps of establishing a communication path between a centralized server and a client device; generating, by the centralized server, a nonce for transmission to the client device, wherein the nonce is associated with an active time interval and corresponds to one of an existing nonce or a new nonce; transmitting the nonce to the client device; receiving a signed attestation result that includes the nonce from the client device, wherein, the signed attestation result comprises a previously-generated signed attestation result if the nonce corresponds to the existing nonce previously received by the client device; and the signed attestation result comprises a new signed attestation result if the nonce corresponds to the existing nonce newly received by the client device or corresponds to the new nonce.
Public/Granted literature
- US20220303256A1 Systems and Methods for Addressing Cryptoprocessor Hardware Scaling Limitations Public/Granted day:2022-09-22
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