Invention Grant
- Patent Title: Semiconductor device assembly with graded modulus underfill and associated methods and systems
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Application No.: US17850978Application Date: 2022-06-27
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Publication No.: US11682563B2Publication Date: 2023-06-20
- Inventor: Jungbae Lee , Chih Hong Wang
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/29 ; H01L23/31 ; H01L23/00

Abstract:
Underfill materials with graded moduli for semiconductor device assemblies, and associated methods and systems are disclosed. In one embodiment, the underfill material between a semiconductor die and a package substrate includes a matrix material, first filler particles with a first size distribution, and second filler particles with a second size distribution different than the first size distribution. Centrifugal force may be applied to the underfill material to arrange the first and second filler particles such that the underfill material may form a first region having a first elastic modulus and a second region having a second elastic modulus different than the first elastic modulus. Once the underfill material is cured, portions of conductive pillars coupling the semiconductor die with the package substrate may be surrounded by the first region, and conductive pads of the package substrate may be surrounded by the second region.
Public/Granted literature
- US20220328326A1 SEMICONDUCTOR DEVICE ASSEMBLY WITH GRADED MODULUS UNDERFILL AND ASSOCIATED METHODS AND SYSTEMS Public/Granted day:2022-10-13
Information query
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