A chip resistor structure includes a substrate; a pair of first electrodes disposed opposite to each other on a first surface of the substrate at a first interval; a resistance layer disposed between the pair of first electrodes on the first surface; a spacer layer made of a material having a composition different from that of the resistance layer, disposed over the pair of first electrodes; a protective layer overlying the resistance layer; and a plating layer electroplated onto the pair of first electrodes and the spacer layer, and having ends extending beyond the pair of first electrodes terminate at least over the spacer layer. The plating layer may be joined with or spaced from or climb up to the protective layer on or above the spacer layer.