Invention Grant
- Patent Title: Semiconductor arrangement and method for producing the same
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Application No.: US16792682Application Date: 2020-02-17
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Publication No.: US11688712B2Publication Date: 2023-06-27
- Inventor: Olaf Hohlfeld
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: EP 157627 2019.02.18
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L27/12

Abstract:
A semiconductor arrangement includes a semiconductor substrate having a dielectric insulation layer and at least a first metallization layer arranged on a first side of the dielectric insulation layer. The first metallization layer includes at least two sections, each section being separated from a neighboring section by a recess. A semiconductor body is arranged on one of the sections of the first metallization layer. At least one indentation is arranged between a first side of the semiconductor body and a closest edge of the respective section of the first metallization layer. A distance between the first side and the closest edge of the section of the first metallization layer is between 0.5 mm and 5 mm.
Public/Granted literature
- US20200266171A1 Semiconductor Arrangement and Method for Producing the Same Public/Granted day:2020-08-20
Information query
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