- 专利标题： 3D stacked integrated circuits having functional blocks configured to accelerate artificial neural network (ANN) computation
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申请号： US17160287申请日： 2021-01-27
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公开(公告)号： US11688734B2公开(公告)日： 2023-06-27
- 发明人: Tony M. Brewer
- 申请人： Micron Technology, Inc.
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Greenberg Traurig
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L27/06 ; H01L25/065 ; H01L25/10 ; H01L21/768 ; H01L23/495 ; H01L23/31
摘要：
A three-dimensional stacked integrated circuit (3D SIC) for implementing an artificial neural network (ANN) having a memory die having an array of memory partitions. Each partition of the array of memory partitions is configured to store parameters of a set of neurons. The 3D SIC also has a processing logic die having an array of processing logic partitions. Each partition of the array of processing logic partitions is configured to: receive input data, and process the input data according to the set of neurons to generate output data.
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