Different diffusion break structures for three-dimensional stacked semiconductor device
Abstract:
A multi-stack semiconductor device formed to cover a plurality of gate pitches includes: a 1st transistor; a 2nd transistor formed at a right side of the 1st transistor, and isolated from the transistor by a 1st portion of a diffusion break structure; a 3rd transistor formed vertically above or below the 1st transistor; and a 4th transistor formed at a right side of the 3rd transistor, and isolated from the 3rd transistor by a 2nd portion of the diffusion break structure, wherein the 1st portion and the 2nd portion of the diffusion break structure are formed of different material compositions or have different physical dimensions.
Information query
Patent Agency Ranking
0/0