发明授权
- 专利标题: Methods and apparatus to calibrate a dual-residue pipeline analog to digital converter
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申请号: US17515041申请日: 2021-10-29
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公开(公告)号: US11689210B2公开(公告)日: 2023-06-27
- 发明人: Prasanth K , Srinivas Kumar Reddy Naru , Visvesvaraya Appala Pentakota
- 申请人: Texas Instruments Incorporated
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Valerie M. Davis; Frank D. Cimino
- 主分类号: H03M1/10
- IPC分类号: H03M1/10
摘要:
An example apparatus includes: an analog input; a resistor circuit including a first reference output and a second reference output; a first amplifier including a first analog input, a first reference input, and a first amplifier output, the first analog input coupled to the analog input, the first reference input coupled to the first reference output; a second amplifier including a second analog input, a second reference input, and a second amplifier output, the second analog input coupled to the analog input, the second reference input coupled to the second reference output; a first comparator including a first comparator input, the first comparator input coupled to the first amplifier output; and a second comparator including a second comparator input, the second comparator input coupled to the second amplifier output; a first multiplexer including a first multiplexer input and a first residue output, the first multiplexer input coupled to the first amplifier output; and a second multiplexer including a second multiplexer input and a second residue output, the second multiplexer input coupled to the second amplifier output.
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