Invention Grant
- Patent Title: Semiconductor die package with multi-lid structures and method for forming the same
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Application No.: US17318163Application Date: 2021-05-12
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Publication No.: US11694941B2Publication Date: 2023-07-04
- Inventor: Shu-Shen Yeh , Che-Chia Yang , Chia-Kuei Hsu , Ming-Chih Yew , Po-Yao Lin , Shin-Puu Jeng
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L23/373
- IPC: H01L23/373 ; H01L23/29 ; H01L23/58

Abstract:
A semiconductor die package and a method of forming the same are provided. The semiconductor die package includes a package substrate, an interposer substrate over the package substrate, semiconductor dies over the interposer substrate, and an underfill element over the interposer substrate and between the semiconductor dies and interposer substrate. The semiconductor die package also includes a ring structure and one or more lid structures separated from the ring structure. The ring structure is coupled to the package substrate to control warpage. The lid structures are coupled to the top surfaces of the semiconductor dies to control warpage and help heat dissipation. In addition, the lid structures define a gap to allow a portion of the underfill element between the adjacent semiconductor dies to be exposed, so that stress concentration on that portion can be avoided or reduced. Accordingly, the reliability of the semiconductor die package is improved.
Public/Granted literature
- US20220367314A1 SEMICONDUCTOR DIE PACKAGE WITH MULTI-LID STRUCTURES AND METHOD FOR FORMING THE SAME Public/Granted day:2022-11-17
Information query
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