An analog-to-digital circuit that digitizes an analog voltage. The analog-to-digital circuit includes plural comparators functionally connected to form a tree that has levels i, and each level i has branches j, and an encoder connected to the plural comparators and configured to generate a digitized value of an input analog voltage. Each comparator from a level i has first and second outputs, and each of the first and second outputs is electrically connected to an input of different comparators from a next level i+1 of the tree.