Invention Grant
- Patent Title: Ethernet transceiver device and ethernet physical-layer circuit
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Application No.: US17320184Application Date: 2021-05-13
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Publication No.: US11716220B2Publication Date: 2023-08-01
- Inventor: Ming-Chieh Cheng , Liang-Wei Huang
- Applicant: Realtek Semiconductor Corp.
- Applicant Address: TW HsinChu
- Assignee: Realtek Semiconductor Corp.
- Current Assignee: Realtek Semiconductor Corp.
- Current Assignee Address: TW HsinChu
- Agent Winston Hsu
- Priority: TW 0101800 2021.01.18
- Main IPC: H04L12/40
- IPC: H04L12/40 ; H04B3/32 ; H04L69/14

Abstract:
An Ethernet physical-layer circuit corresponding to a first port is connected to a first link partner device through the first port and a first Ethernet cable. The Ethernet physical-layer circuit and other physical-layer circuits all employ an output oscillation signal of a crystal oscillator to respectively generate clock waveforms, and they are configured in a master mode when the crosstalk noise is converged and compensated.
Public/Granted literature
- US20220231879A1 ETHERNET TRANSCEIVER DEVICE AND ETHERNET PHYSICAL-LAYER CIRCUIT Public/Granted day:2022-07-21
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