- 专利标题： Stress compensation for wafer to wafer bonding
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申请号： US16356402申请日： 2019-03-18
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公开(公告)号： US11721554B2公开(公告)日： 2023-08-08
- 发明人: Anant Jahagirdar , Chytra Pawashe , Aaron Lilak , Myra McDonnell , Brennen Mueller , Mauro Kobrinsky
- 申请人： Intel Corporation
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Schwabe, Williamson & Wyatt. P.C.
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L29/10 ; H01L29/66 ; H01L29/161 ; H01L21/20 ; H01L21/56 ; H01L21/02 ; H01L21/603
摘要：
Embodiments herein describe techniques for bonded wafers that includes a first wafer bonded with a second wafer, and a stress compensation layer in contact with the first wafer or the second wafer. The first wafer has a first stress level at a first location, and a second stress level different from the first stress level at a second location. The stress compensation layer includes a first material at a first location of the stress compensation layer that induces a third stress level at the first location of the first wafer, a second material different from the first material at a second location of the stress compensation layer that induces a fourth stress level different from the third stress level at the second location of the first wafer. Other embodiments may be described and/or claimed.
公开/授权文献
- US20200303191A1 STRESS COMPENSATION FOR WAFER TO WAFER BONDING 公开/授权日：2020-09-24
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