A chip includes a security core module. The security core module includes a security core and a memory. The security core module prevents access of an external module that is inside the chip and that is other than the security core module, and the security core module prevents access of an external device outside the chip. The security core is configured to generate a layer 1 public key and a layer 1 private key based on a hash of a first root public key and a UDS of the chip stored in the memory; and the memory is configured to store the layer 1 private key.