A gate driver includes stages connected to clock signal lines to which clock signals are applied and a first gate power line to which a first gate power voltage is applied, and outputting the first gate power voltage as gate signals in response to the clock signals. The clock signals have a first frequency and the first gate power voltage has a first voltage level in a first period. The clock signals have a second frequency lower than the first frequency and the first gate power voltage has a second voltage level in a second period. One of the first and second voltage levels is a gate-on voltage level that turns on a transistor, and another of the first and second voltage levels is a gate-off voltage level that turns off the transistor.