A memory controller includes: a map cache area for storing a map cache lines including mapping information between a logical address and a physical address; a victim map cache line selector for selecting a victim map cache line among the map cache lines, using a victim map cache line selection model trained by using a storage state information as training data, when a physical address corresponding to a logical address of an operation request is absent in the map cache area; and a map data controller for removing the selected victim map cache line from the map cache area, providing the removed victim map cache line to a memory device, receiving a target map cache line including the physical address corresponding to the logical address of the operation request from the memory device, and storing the target map cache line in the map cache area.