Invention Grant
- Patent Title: Power-on read demarcation voltage optimization
-
Application No.: US17393112Application Date: 2021-08-03
-
Publication No.: US11756597B2Publication Date: 2023-09-12
- Inventor: Mikai Chen , Zhenlei Shen , Murong Lang , Zhenming Zhou
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: LOWENSTEIN SANDLER LLP
- Main IPC: G11C7/20
- IPC: G11C7/20 ; G11C5/14 ; G11C11/4096 ; G11C7/10

Abstract:
A system includes a memory device having memory cells and a processing device operatively coupled to the memory device. The processing device is to perform operations including: determining a length of time the memory device has been powered off; and in response to determining that the length of time satisfies a threshold value: for each of multiple groups of memory cells, asserting a corresponding flag; determining, based on the length of time, one or more adjusted demarcation voltages to be used in reading a state of the multiple groups of memory cells; and storing the one or more adjusted demarcation voltages for use in performing memory operations.
Public/Granted literature
- US20230043775A1 POWER-ON READ DEMARCATION VOLTAGE OPTIMIZATION Public/Granted day:2023-02-09
Information query