Invention Grant
- Patent Title: Full-path circuit delay measurement device for field-programmable gate array (FPGA) and measurement method
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Application No.: US17801266Application Date: 2021-09-22
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Publication No.: US11762015B2Publication Date: 2023-09-19
- Inventor: Weixiong Jiang , Yajun Ha
- Applicant: SHANGHAITECH UNIVERSITY
- Applicant Address: CN Shanghai
- Assignee: SHANGHAITECH UNIVERSITY
- Current Assignee: SHANGHAITECH UNIVERSITY
- Current Assignee Address: CN Shanghai
- Agency: Bayramoglu Law Offices LLC
- Priority: CN 2110473251.1 2021.04.29
- International Application: PCT/CN2021/119511 2021.09.22
- International Announcement: WO2022/227382A 2022.11.03
- Date entered country: 2022-08-22
- Main IPC: G01R31/317
- IPC: G01R31/317

Abstract:
A full-path circuit delay measurement device for a field-programmable gate array (FPGA) and a measurement method are provided. The measurement device includes two shadow registers and a phase-shifted clock, where the two shadow registers take an output of a measured combinational logic circuit as a clock and sample the phase-shifted clock SCLK as data; the two shadow registers are respectively triggered on rising and falling edges of the output of the measured combinational logic circuit to sample the phase-shifted clock; outputs of the two shadow registers are delivered by an OR gate as an input into a synchronization register; a clock of the synchronization register serves as a clock MCLK of the measured combinational logic circuit; an output of the synchronization register serves as that of the circuit delay measurement device; the phase-shifted clock SCLK and the clock MCLK of the measured combinational logic circuit have the same frequency.
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