A display device includes a display panel in which a plurality of pixels including first, second, and third subpixels disposed in a region where a plurality of gate lines extending in a first direction and a plurality of data lines extending in a second direction intersect. The display device further includes a gate driving circuit configured to drive the plurality of gate lines, a data driving circuit configured to drive the plurality of data lines, and a timing controller configured to control the gate driving circuit and the data driving circuit. In the display panel, a first data voltage is applied to the first subpixel, and a second data voltage is applied to the second subpixels or the third subpixels.