- Patent Title: Via array design for multi-layer redistribution circuit structure
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Application No.: US17179357Application Date: 2021-02-18
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Publication No.: US11776899B2Publication Date: 2023-10-03
- Inventor: Che-Hung Kuo , Hsing-Chih Liu
- Applicant: MEDIATEK INC.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/31

Abstract:
An interconnect structure for a redistribution layer includes an intermediate via land pad; a cluster of upper conductive vias abutting the intermediate via land pad and electrically coupling the intermediate via land pad to an upper via land pad; and an array of lower conductive vias electrically coupling the intermediate via land pad with a lower circuit pad. The array of lower conductive vias is arranged within a horseshoe-shaped via array region extending along a perimeter of the intermediate via land pad. The array of lower conductive vias arranged within the horseshoe-shaped via array region does not overlap with the cluster of upper conductive vias.
Public/Granted literature
- US20210351124A1 VIA ARRAY DESIGN FOR MULTI-LAYER REDISTRIBUTION CIRCUIT STRUCTURE Public/Granted day:2021-11-11
Information query
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