Invention Grant
- Patent Title: Devices including gate spacer with gap or void and methods of forming the same
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Application No.: US17842193Application Date: 2022-06-16
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Publication No.: US11784241B2Publication Date: 2023-10-10
- Inventor: Kuo-Cheng Chiang , Ching-Wei Tsai , Chi-Wen Liu , Ying-Keung Leung
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- The original application number of the division: US14739977 2015.06.15
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L29/66 ; H01L29/165 ; H01L29/08 ; H01L21/02 ; H01L21/283 ; H01L29/78 ; H01L21/768
Abstract:
Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance with some embodiments, a structure includes a substrate, a gate stack over the substrate, a contact over the substrate, and a spacer disposed laterally between the gate stack and the contact. The spacer includes a first dielectric sidewall portion and a second dielectric sidewall portion. A void is disposed between the first dielectric sidewall portion and the second dielectric sidewall portion.
Public/Granted literature
- US20220310826A1 Devices Including Gate Spacer with Gap or Void and Methods of Forming the Same Public/Granted day:2022-09-29
Information query
IPC分类:
