Invention Grant
- Patent Title: Semiconductor device having a ferroelectric gate stack
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Application No.: US17387504Application Date: 2021-07-28
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Publication No.: US11791383B2Publication Date: 2023-10-17
- Inventor: Saurabh Roy , Thomas Aichinger , Hans-Joachim Schulze
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/16 ; H01L29/51

Abstract:
A semiconductor device includes a SiC substrate and a plurality of transistor cells formed in the SiC substrate and electrically connected in parallel to form a transistor. Each transistor cell includes a gate structure including a gate electrode and a gate dielectric stack separating the gate electrode from the SiC substrate. The gate dielectric stack includes a ferroelectric insulator. The transistor has a specified operating temperature range, and the ferroelectric insulator is doped with a doping material such that the Curie temperature of the ferroelectric insulator is in a range above the specified operating temperature range of the transistor. A corresponding method of producing the semiconductor device is also described.
Public/Granted literature
- US20230035144A1 SEMICONDUCTOR DEVICE HAVING A FERROELECTRIC GATE STACK Public/Granted day:2023-02-02
Information query
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