- 专利标题: Self-aligned vertical integration of three-terminal memory devices
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申请号: US17283645申请日: 2019-10-22
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公开(公告)号: US11792987B2公开(公告)日: 2023-10-17
- 发明人: Thorsten Lill , Meihua Shen , John Hoang , Hui-Jung Wu , Gereng Gunawan , Yang Pan
- 申请人: LAM RESEARCH CORPORATION
- 申请人地址: US CA Fremont
- 专利权人: LAM RESEARCH CORPORATION
- 当前专利权人: LAM RESEARCH CORPORATION
- 当前专利权人地址: US CA Fremont
- 国际申请: PCT/US2019/057418 2019.10.22
- 国际公布: WO2020/086566A 2020.04.30
- 进入国家日期: 2021-04-08
- 主分类号: H10B43/27
- IPC分类号: H10B43/27 ; H10B41/10 ; H10B41/27 ; H10B43/10 ; H10B51/10 ; H10B51/20
摘要:
A three-dimensional (3D) memory structure includes memory cells and a plurality of oxide layers and a plurality of word line layers. The plurality of oxide layers and the plurality of word line layers are alternately stacked in a first direction. A plurality of double channel holes extend through the plurality of oxide layers and the plurality of word line layers in the first direction. The plurality of double channel holes have a peanut-shaped cross-section in a second direction that is transverse to the first direction.
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