Invention Grant
- Patent Title: Managing information protection schemes in memory systems
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Application No.: US17510135Application Date: 2021-10-25
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Publication No.: US11797385B2Publication Date: 2023-10-24
- Inventor: Vincenzo Reina
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F11/07

Abstract:
Methods, systems, and devices for managing information protection schemes in memory systems are described. A memory device may dynamically select an information protection scheme from a set of information protection schemes. In some examples, the memory device may identify a quantity of defective blocks in each plane associated with a control. The memory device may then identify a quantity of planes that satisfy a block threshold. In some cases, the memory device may select an information protection scheme using the quantity of planes. The information protection scheme may be an example of a redundant array of independent nodes scheme, and may indicate a quantity of planes used in performing a protected write operation.
Public/Granted literature
- US20230132223A1 MANAGING INFORMATION PROTECTION SCHEMES IN MEMORY SYSTEMS Public/Granted day:2023-04-27
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