Invention Grant
- Patent Title: Techniques for storing sub-alignment data when accelerating Smith-Waterman sequence alignments
-
Application No.: US17491266Application Date: 2021-09-30
-
Publication No.: US11822541B2Publication Date: 2023-11-21
- Inventor: Maciej Piotr Tyrlik , Ajay Sudarshan Tirumala , Shirish Gadre
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA CORPORATION
- Current Assignee: NVIDIA CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06F16/23
- IPC: G06F16/23 ; G16B30/10 ; G16B50/30 ; G06F16/242

Abstract:
Various techniques for accelerating Smith-Waterman sequence alignments are provided. For example, threads in a group of threads are employed to use an interleaved cell layout to store relevant data in registers while computing sub-alignment data for one or more local alignment problems. In another example, specialized instructions that reduce the number of cycles required to compute each sub-alignment score are utilized. In another example, threads are employed to compute sub-alignment data for a subset of columns of one or more local alignment problems while other threads begin computing sub-alignment data based on partial result data received from the preceding threads. After computing a maximum sub-alignment score, a thread stores the maximum sub-alignment score and the corresponding position in global memory.
Public/Granted literature
- US20230095916A1 TECHNIQUES FOR STORING SUB-ALIGNMENT DATA WHEN ACCELERATING SMITH-WATERMAN SEQUENCE ALIGNMENTS Public/Granted day:2023-03-30
Information query