Invention Grant
- Patent Title: Flash memory structure and method of forming the same
-
Application No.: US17228072Application Date: 2021-04-12
-
Publication No.: US11856775B2Publication Date: 2023-12-26
- Inventor: Sheng-Chih Lai , Chung-Te Lin , Yung-Yu Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: HAYNES AND BOONE, LLP
- The original application number of the division: US16509728 2019.07.12
- Main IPC: H10B43/20
- IPC: H10B43/20 ; H10B41/20 ; H10B43/27 ; H01L23/532 ; H01L21/28

Abstract:
Memory devices and methods of forming the same are provided. A memory device of the present disclosure includes a bottom dielectric layer, a gate structure extending vertically from the bottom dielectric layer, a stack structure, and a dielectric layer extending between the gate structure and the stack structure. The stack structure includes a first silicide layer, a second silicide layer, an oxide layer extending between the first and second silicide layers, a channel region over the oxide layer and extending between the first and second silicide layers, and an isolation layer over the second silicide layer. The first and second silicide layers include cobalt, titanium, tungsten, or palladium.
Public/Granted literature
- US20210233931A1 Flash Memory Structure and Method of Forming the Same Public/Granted day:2021-07-29
Information query