Invention Grant
- Patent Title: Layered process-constructed double-winding embedded solenoid inductor
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Application No.: US17173486Application Date: 2021-02-11
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Publication No.: US11881343B2Publication Date: 2024-01-23
- Inventor: Aleksey S. Khenkin , David Patten , Jun Yan
- Applicant: Cirrus Logic International Semiconductor Ltd.
- Applicant Address: GB Edinburgh
- Assignee: Cirrus Logic, Inc.
- Current Assignee: Cirrus Logic, Inc.
- Current Assignee Address: US TX Austin
- Agency: Huffman Law Group, PC
- Agent E. Alan Davis
- Main IPC: H01F7/06
- IPC: H01F7/06 ; H01F27/28 ; H01F17/00 ; H01F27/24 ; H01F41/08

Abstract:
A method for constructing a solenoid inductor includes positioning an inner winding substantially around a magnetic core, positioning an outer winding substantially around the inner winding, and using a layered process to perform said positioning the inner and outer windings. The layered process includes processing a first conducting layer as a bottom layer of the outer winding, above processing a first dielectric layer, above processing a second conducting layer as a bottom layer of the inner winding, above processing a second dielectric layer, above processing a magnetic core layer, above processing a third dielectric layer, above processing a third conducting layer as a top layer of the inner winding, above processing a fourth dielectric layer, above processing a fourth conducting layer as a top layer of the outer winding, above processing a fifth dielectric layer, and the inner and outer windings are electrically connected.
Public/Granted literature
- US20210287841A1 LAYERED PROCESS-CONSTRUCTED DOUBLE-WINDING EMBEDDED SOLENOID INDUCTOR Public/Granted day:2021-09-16
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