A gate driver includes signal transmission units cascade-connected via a carry line to which a carry signal is applied from a previous signal transmission unit. An nth signal transmission unit includes: a first circuit including a first Q logic generator to receive the carry signal from the previous signal transmission unit to charge a first control node, and a second Q logic generator to discharge the first control node; a second circuit to discharge a second control node according to a first control node voltage; and an output to output the carry signal and a gate signal based on potentials of the first and second control nodes. The second Q logic generator includes: a second-1 transistor and a second-2 transistor each respectively having a first electrode, a gate electrode, a back gate electrode, and a second electrode.