Invention Grant
- Patent Title: Method of manufacturing a semiconductor package
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Application No.: US17493975Application Date: 2021-10-05
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Publication No.: US11887968B2Publication Date: 2024-01-30
- Inventor: Ji Hwan Hwang , Ji Hoon Kim , Ji Seok Hong , Tae Hun Kim , Hyuek Jae Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Muir Patent Law, PLLC
- Priority: KR 20180127518 2018.10.24
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/48 ; H01L21/768 ; H01L25/00 ; H01L23/00

Abstract:
A semiconductor package includes a base structure having a base pad, a first semiconductor chip on the base structure, and having a first connection pad bonded to the base pad, a first bonding structure including an base insulation layer of a base structure and a first lower insulation layer of the first semiconductor chip bonded to the base insulation layer, a second semiconductor chip on the first semiconductor chip, and having a second connection pad connected to the first through-electrode, and a second bonding structure including a first upper insulation layer of the first semiconductor chip, and a second lower insulation layer of the second semiconductor chip bonded to the first upper insulation layer, and the first upper insulation layer has a dummy insulation portion extending onto the base structure around the first semiconductor chip.
Public/Granted literature
- US20220028837A1 METHOD OF MANUFACTURING A SEMICONDUCTOR PACKAGE Public/Granted day:2022-01-27
Information query
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