- 专利标题： Dielectric isolation layer between a nanowire transistor and a substrate
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申请号： US17850799申请日： 2022-06-27
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公开(公告)号： US11901458B2公开(公告)日： 2024-02-13
- 发明人: Bruce E. Beattie , Leonard Guler , Biswajeet Guha , Jun Sung Kang , William Hsu
- 申请人： Intel Corporation
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Schwabe, Williamson & Wyatt, P.C.
- 主分类号： H01L29/78
- IPC分类号： H01L29/78 ; H01L21/8234 ; H01L27/088 ; H01L29/06 ; H01L29/08 ; H01L29/423 ; H01L29/66
摘要：
Gate all around semiconductor devices, such as nanowire or nanoribbon devices, are described that include a low dielectric constant (“low-k”) material disposed between a first nanowire closest to the substrate and the substrate. This configuration enables gate control over all surfaces of the nanowires in a channel region of a semiconductor device via the high-k dielectric material, while also preventing leakage current from the first nanowire into the substrate.
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