- Patent Title: Array substrate, preparation method therefor, and display device
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Application No.: US17264283Application Date: 2020-05-12
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Publication No.: US11930679B2Publication Date: 2024-03-12
- Inventor: Jingang Fang , Luke Ding , Jun Liu , Bin Zhou , Jun Cheng
- Applicant: Hefei Xinsheng Optoelectronics Technology Co., Ltd. , BOE Technology Group Co., Ltd.
- Applicant Address: CN Hefei
- Assignee: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.,BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.,BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Anhui; CN Beijing
- Agency: IPro, PLLC
- Priority: CN 1910412086.1 2019.05.17
- International Application: PCT/CN2020/089820 2020.05.12
- International Announcement: WO2020/233453A 2020.11.26
- Date entered country: 2021-01-28
- Main IPC: H10K59/35
- IPC: H10K59/35 ; H01L27/12 ; H10K50/86 ; H10K59/12 ; H10K59/121 ; H10K59/123 ; H10K59/124 ; H10K71/00

Abstract:
The present disclosure relates to the technical field of display, and discloses an array substrate, a preparation method therefor, and a display device. When dielectric layers, such as a buffer layer, an interlayer dielectric layer, and a gate insulation layer, are formed between a source-drain electrode and a substrate, the thickness of at least one dielectric layer among said dielectric layers underneath a first through hole for connecting a drain electrode and an anode is increased, which is to say that the drain electrode is raised to be further away from the substrate, causing the drain electrode to be closer to a surface of a planarization layer that faces away from the substrate, i.e., reducing the thickness of a portion of the planarization layer above the drain electrode.
Public/Granted literature
- US20210296406A1 ARRAY SUBSTRATE, PREPARATION METHOD THEREFOR, AND DISPLAY DEVICE Public/Granted day:2021-09-23
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