- 专利标题: Formation method of chip package with fan-out feature
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申请号: US17554552申请日: 2021-12-17
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公开(公告)号: US11948892B2公开(公告)日: 2024-04-02
- 发明人: Po-Hao Tsai , Meng-Liang Lin , Po-Yao Chuang , Techi Wong , Shin-Puu Jeng
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址: TW Hsinchu
- 代理机构: McClure, Qualey & Rodack, LLP
- 分案原申请号: US16446796 2019.06.20
- 主分类号: H01L23/31
- IPC分类号: H01L23/31 ; H01L21/48 ; H01L21/56 ; H01L23/538 ; H01L25/00 ; H01L25/18
摘要:
A method for forming a package structure is provided. The method includes forming first conductive structures and a first semiconductor die on a same side of a redistribution structure. The method includes forming an interposer substrate over the redistribution structure, wherein the first semiconductor die is between the interposer substrate and the redistribution structure, and edges of the interposer substrate extend beyond edges of the first semiconductor die. The method includes forming a second semiconductor die on the redistribution structure, wherein the first semiconductor die and the second semiconductor die are disposed on opposite sides of the redistribution structure.
公开/授权文献
- US20220108956A1 FORMATION METHOD OF CHIP PACKAGE WITH FAN-OUT FEATURE 公开/授权日:2022-04-07
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