A multi-die processor semiconductor package includes a first base integrated circuit (IC) die configured to provide, based at least in part on an indication of a configuration of a first plurality of compute dies 3D stacked on top of the first base IC die, a unique power domain to each of the first plurality of compute dies. In some embodiments, the semiconductor package also includes a second base IC die including a second plurality of compute dies 3D stacked on top of the second base IC die and an interconnect communicably coupling the first base IC die to the second base IC die.