Invention Grant
- Patent Title: Semiconductor device examination method and semiconductor device examination device
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Application No.: US17606829Application Date: 2020-04-09
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Publication No.: US12044729B2Publication Date: 2024-07-23
- Inventor: Tomochika Takeshima , Takafumi Higuchi , Kazuhiro Hotta
- Applicant: HAMAMATSU PHOTONICS K.K.
- Applicant Address: JP Hamamatsu
- Assignee: HAMAMATSU PHOTONICS K.K.
- Current Assignee: HAMAMATSU PHOTONICS K.K.
- Current Assignee Address: JP Hamamatsu
- Agency: Faegre Drinker Biddle & Reath LLP
- Priority: JP 19102282 2019.05.31
- International Application: PCT/JP2020/015978 2020.04.09
- International Announcement: WO2020/241082A 2020.12.03
- Date entered country: 2021-10-27
- Main IPC: G01R31/303
- IPC: G01R31/303

Abstract:
A semiconductor device examination method includes a step of acquiring a first interference waveform based on signals from a plurality of drive elements according to light from a first light beam spot including the plurality of drive elements in a semiconductor device, a step of acquiring a second interference waveform based on signals from the plurality of drive elements according to light from a second light beam spot having a region configured to partially overlap the first spot and including the plurality of drive elements, and a step of separating a waveform signal for each of the drive elements in the first and second spots based on the first and second interference waveforms.
Public/Granted literature
- US20220206063A1 SEMICONDUCTOR DEVICE EXAMINATION METHOD AND SEMICONDUCTOR DEVICE EXAMINATION DEVICE Public/Granted day:2022-06-30
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