发明授权
- 专利标题: Gate-all-around structure with self substrate isolation and methods of forming the same
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申请号: US17498093申请日: 2021-10-11
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公开(公告)号: US12046681B2公开(公告)日: 2024-07-23
- 发明人: Cheng-Ting Chung , Ching-Wei Tsai , Kuan-Lun Cheng
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsinchu
- 代理机构: HAYNES AND BOONE, LLP
- 分案原申请号: US16583449 2019.09.26
- 主分类号: H01L29/786
- IPC分类号: H01L29/786 ; H01L29/06 ; H01L29/423 ; H01L29/66 ; H01L29/78
摘要:
Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a fin substrate having a first dopant concentration; an anti-punch through (APT) layer disposed over the fin substrate, wherein the APT layer has a second dopant concentration that is greater than the first dopant concentration; a nanostructure including semiconductor layers disposed over the APT layer; a gate structure disposed over the nanostructure and wrapping each of the semiconductor layers, wherein the gate structure includes a gate dielectric and a gate electrode; a first epitaxial source/drain (S/D) feature and a second epitaxial S/D feature disposed over the APT layer, wherein the gate structure is disposed between the first epitaxial S/D feature and the second epitaxial S/D feature; and an isolation layer disposed between the APT layer and the fin substrate, wherein a material of the isolation layer is the same as a material of the gate dielectric.
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