Invention Grant
- Patent Title: Multiple (multi-) die integrated circuit (IC) packages for supporting higher connection density, and related fabrication methods
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Application No.: US17484475Application Date: 2021-09-24
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Publication No.: US12062648B2Publication Date: 2024-08-13
- Inventor: Darko Popovic , Durodami Lisk , Yue Li
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM INCORPORATED
- Current Assignee: QUALCOMM INCORPORATED
- Current Assignee Address: US CA San Diego
- Agency: Withrow & Terranova, PLLC
- Main IPC: H01L25/10
- IPC: H01L25/10 ; H01L23/00 ; H01L23/498 ; H01L25/00

Abstract:
Multiple (multi-) die integrated circuit (IC) packages for supporting higher connection density, and related fabrication methods. The multi-die IC package includes split dies that provided in respective die packages that are stacked on top of each other to conserve package area. To support signal routing, including through-package signal routing that extends through the die package, each die package includes vertical interconnects disposed adjacent to their respective dies and coupled to a respective package substrate (and interposer substrate if provided) in the package substrate. In this manner, as an example, through-silicon-vias (TSVs) are not required to be fabricated in the multi-die IC package that extend through the dies themselves to provide signal routing between the respective die packages. In another example, space created between adjacent interposer substrates of stacked die packages, as stood off from each other through the interconnect bumps, provides an area for heat dissipation.
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