- 专利标题: SerDes receiver with optimized CDR pulse shaping
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申请号: US17589314申请日: 2022-01-31
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公开(公告)号: US12074737B2公开(公告)日: 2024-08-27
- 发明人: Chaitanya Palusa , Rob Abbott , Rolando Ramirez , Wei-Li Chen , Dirk Pfaff , Cheng-Hsiang Hsieh , Fan-ming Kuo
- 申请人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Merchant & Gould P.C.
- 主分类号: H04L25/03
- IPC分类号: H04L25/03 ; H03K5/00 ; H03K5/135 ; H04L25/02 ; H04L27/01
摘要:
An optimized pulse shaping clock data recovery system is provided that includes a slicer configured to receive a signal and provide an initial set of tentative decisions to a decision feedforward equalizer, where the decision feedforward equalizer provides a fully equalized output signal. The slicer may be incorporated as part of decision feedback equalizer to provide better quality tentative decisions. The clock data recovery system also receives the first output signal that is partially equalized in such a way as to optimally shape it for a clock to sample it at an ideal location by providing an adjustment signal to the analog to digital controller.
公开/授权文献
- US20220158878A1 SERDES RECEIVER WITH OPTIMIZED CDR PULSE SHAPING 公开/授权日:2022-05-19
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